Frame, bit and chip error rate evaluation for a DSSS communication system

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D. PACHECO BAUTISTA
M. SÁNCHEZ MERAZ
F. R. CASTILLO SORIA

Abstract

THE RELATION BETWEEN CHIPS, BITS AND FRAMES ERROR RATES IN THE ADDITIVE WHITE GAUSSIAN NOISE (AWGN) CHANNEL FOR A DIRECT SEQUENCE SPREAD SPECTRUM (DSSS) SYSTEM, IN MULTIPLE ACCESS INTERFERENCE (MAI) CONDITIONS IS EVALUATED. A SIMPLE ERROR-CORRECTION CODE (ECC ) FOR THE FRAME ERROR RATE (FER) EVALUATION IS USED. 64 BITS (CHIPS) PSEUDO NOISE (PN) SEQUENCES ARE EMPLOYED FOR THE SPREAD SPECTRUM TRANSMISSION. ANITERATIVE MONTECARLO (STOCHASTIC) SIMULATION IS USED TO EVALUATE HOW MANY ERRORS ON CHIPS ARE INTRODUCED FOR CHANNEL EFFECTS AND HOW THEY ARE RELATED TO THE BIT ERRORS. IT CAN BE OBSERVED HOW THE BIT ERRORS MAY EVENTUALLY CAUSE A FRAME ERROR, I. E. CODEC OR COMMUNICATION ERROR. THESE RESULTS ARE USEFUL FOR ACADEMICS, ENGINEERS, OR PROFESSIONALS ALIKE.

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How to Cite
PACHECO BAUTISTA, D., SÁNCHEZ MERAZ, M., & CASTILLO SORIA, F. R. (2009). Frame, bit and chip error rate evaluation for a DSSS communication system. Ingeniería Investigación Y Tecnología, 9(003). Retrieved from https://journals.unam.mx/index.php/ingenieria/article/view/13499